NAND Gate

• The circuit below has two inputs and one output.
• Whenever at least one of the inputs is low, the corresponding P-type transistor will be conducting while the N-type transistor will be closed.
• Consequently, the ouput voltage will be high.
• Conversely, if both inputs are high, then both P-type transistors at the top will be open circuits and both N-type transistors will be conducting.
• Hence, the output voltage is low.
• The function of this gate can be summarized by the following table:
  

  V1	V2	Output
  Low	Low	High
  Low	High	High
  High	Low	High
  High	High	Low

• If logical 1's are associated with high voltages then the function of this gate is called NAND for negated AND.
• Again, there is never a conducting path from the supply voltage to ground.

  

Figure 3.3: NAND Circuit and Standard Symbol